A small update on the previous blog post.
In the previous post I actually forgot to mention how to enable the high resolution clock for PWM. There are two ways to do this.
Fiddling with registers
The clock can be enabled in the
CCM_CCGR4 register. Bit 22 and 23, these can be configured to be:
- 00 Clock is off during all modes. Stop enter hardware handshake is disabled.
- 01 Clock is on in run mode, but off in WAIT and STOP modes
- 10 Not applicable (Reserved).
- 11 Clock is on during all modes, except STOP mode.
So we want to set these to 11.
Now we want to enable bit 22-23 so we or it with
So to enable it we set:
And the clocks are running! However this might be risky, if you screw up you might enable or disable a clock. There is a nice ‘hack’ to accomplish the same!
Let the ½ working PWM driver do it for us!
1 2 3
After this, everything works as expected.